1. Field of the Invention
The present invention relates to a dynamic RAM (random access memory) of a double word line type, and more specifically, to a defective cell substituting structure in the double word line type dynamic RAM.
2. Description of Related Art
Recent dynamic RAMs have adopted a so called double word line structure in order to overcome difficulties in microminiaturization of metal wiring conductors. This is reported in "1992 Symposium on VLSI Circuit Digest of Technical Papers", pages 112 to 113. The content of this article is incorporated herein by reference.
FIG. 1 shows a construction of one example of the double word line type dynamic RAM. In the double word line type dynamic RAM shown in FIG. 1, two word drivers 26 are connected to each pair of complementary main word lines 20 coupled to a corresponding main word decoder 24. Each of word drivers 26 is connected to a pair of corresponding word line selection voltage supply lines 30, so as to drive a pair of sub-word lines 22, which cross each pair of bit lines 27 coupled to a sense amplifier 28. At each intersection between the sub-word lines 22 and bit lines 27, a memory cell (not shown) is located. In the shown example, four sub-word lines 22 are extended from one pair of complementary main word lines 22.
In a conventional redundant system for the dynamic RAM, on the other hand, redundant cells are included in each sub-array, as shown in FIG. 2. This is proposed in "IEEE Journal of Solid State Circuits", Vol. 26, January 1991, pages 12 to 17. The content of this article is also incorporated herein by reference.
In FIG. 2, sub-arrays of memory cells are depicted by a pear-skin, and an array 28 of sense amplifiers "SA" is located between each pair of adjacent sub-arrays. The mark "x" indicates a defective cell, and a defective word line 32 containing a defective cell is replaced by a substitutional word line 34.
In this conventional redundant system, however, since the number of defective cells is not the same for each of the sub-arrays, there is little case in which all of substitutional cells are actually used.
If this conventional redundant system is applied in the double word line type dynamic RAM, it would become necessary to replace one set of main word lines (namely, four sub-word lines) together by another set. Therefore, the number of required substitutional word lines become non-negligible as compared with 512 word lines provided in each sub-array in ordinary dynamic RAM. In the case of 16 Mbit DRAM having 32 sub-arrays each of which includes 512 word lines, assuming that four redundant main word line pairs are provided for each sub-array, 512 redundant sub-word lines become necessary since 16 redundant sub-word lines are necessary for each one sub-array (16.times.32=512).
In this conventional redundant system for the dynamic-RAM, accordingly, since the substitutional cells are provided in each of the sub-arrays, a minimum unit of cells to be replaced together becomes large in the double word line type dynamic RAM. Therefore, a required chip area correspondingly becomes large. In addition, as mentioned above, since the number of defective cells contained in each sub-array is not at a constant, most of substitutional cells have not been actually used.